June 28 - July 2, 2010
Caen, Normandy, France

2nd Workshop on Dependable Multi-Core Computing (DMCC 2010)


As part of
The International Conference on High Performance Computing & Simulation (HPCS 2010)
in conjunction with
The International Wireless Communications and Mobile Computing Conference (IWCMC 2010)

Extended Full Paper Submission Deadline: February 28, 2010

Brief Description
The quest for high-performance computing has lead to a reckless competition between chip manufacturers.  Only two manufacturers, who can withstand the cost pressure of fabricating < 45 nm designs, remain.  Today, the integration of four cores is common - and the end of the road is not in sight.  These multi-Core architectures bring up unprecedented capabilities, opportunities, as well as challenges.  The more transistors are integrated on a chip and the more cores are introduced, the more faults can be asserted.  These faults arise either during fabrication or operation.  As the fabrication costs are continuously rising, it is most important to increase the output of a fab by software, architectural, or physical means.  This workshop addresses issues and solutions through dependable software or hardware design of multi- and many-core systems.

The Workshop supports (but is not limited to) the following topics:
  • Dependable Multi-Core Architectures
  • Power-Aware Multi-Core Design
  • Dependable & Secure Many-Core Designs
  • Multi-Core Development and Design Tools
  • Simulation Techniques
  • System-Level Multi-Core Implementation
  • Multi-Core Interconnect Technology
  • Multi-Core System-On-Chip Development
  • Reconfigurable Computing and FPGA
  • Design for Testing
  • Hardware and Software Debug Facilities
  • Multi-Core Programming and Optimization
  • Application Partitioning and Load Balancing
  • Fab-Aware Scheduling
  • Hypervisors and Virtual Machine Technology
  • Trusted and Untrusted Environments
  • Virtualization for Dependability
  • Dependability through Multi-Threading
  • Fault Detection on the Physical Layer
  • Fault-Tolerant Software Design
  • Fault-Tolerant Hardware Design
  • Fault-Tolerant HW/SW Co-Design

Paper Submissions:
Submitted papers must not have been published or simultaneously submitted elsewhere.  Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and email addresses.  Please, indicate clearly the corresponding author and include up to 6 keywords from the above list of topics and an abstract of no more than 450 words.  The full manuscript should be at most 7 pages using the two-column IEEE format.  Additional pages will be charged at additional fee.  Please include page numbers on all submissions to make it easier for reviewers to provide helpful comments.  Submit a PDF copy of your full manuscript via email to the Workshop organizer at Bernhard.Fechner@FernUni-Hagen.de .

Only PDF files will be accepted.  Each paper will receive a minimum of three reviews.  Papers will be selected based on their originality, relevance, technical clarity and presentation. Authors of accepted papers must guarantee that their papers will be registered and presented at the workshop. Papers reporting original and unpublished research results on the workshop and related topics are solicited. Accepted papers will be published in the conference proceedings which will be available at the time of the meeting.  If you have any questions about paper submission or the workshop, please contact the organizer.

Important Dates:
Extended Full Paper Submission Deadline: -------------------------------------------     February 28, 2010
Acceptance Notification: -------------------------------------     March 20, 2010
Camera Ready Papers and Registration Due: -----------     April 15, 2010

Workshop Organizer:
Bernhard Fechner
FernUniversität in Hagen
Universitätsstraße 1,
58084 Hagen, Germany
Phone: +49 (2331) 987 4414
Fax:     +49 (2331) 987 308
Email:  Bernhard.Fechner@fernuni-hagen.de

International Program Committee (Partial):
All submitted papers will be reviewed by the workshop technical program committee members following similar criteria used in HPCS. If you have any questions about paper submission or the workshop, please contact the Workshop organizer at the above address.

If you have any questions about conference paper submission, please contact Conference Program Chair: Prof. Waleed W. Smari, University of Dayton, 300 College Park, Dayton, OH 45469-0226, USA, Voice: (937) 681-0098, Fax: (937) 255-4511, Email: smari@arys.org. For information about the HPCS conference in general, please contact the General Chairs or consult the conference web site at http://cisedu.us/cis/hpcs/10/main/callForPapers.jsp.


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